Your search returned 27 records. Click on the hyperlinks to view further details of Titles..

 

Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems

Year : 2001 Volume number : 09 Issue: 01

Low Power Electronics And Design (Article)
Subject: Low Power Design , Vlsi
Author: D. Blaauw      T. Gabara     
page:      1 - 2
Implementation Of A Cmos Lna Plus Mixer For Gps Applications With No External Components (Article)
Subject: Circuit-Analog , Cmos , Communication , Design
Author: F. Svelto      S. Deantoni      G. Montagona      R. Castello     
page:      100 - 103
Design Considerations For Databus Charge Recovery (Article)
Subject: Cmos , Circuit-Analog , Communication
Author: B. Bishop      V. Lyuboslavsky      N. Vijaykrishnan      M. J. Irwin     
page:      104 - 106
Reconfigureable And Adptive Vlsi Systems (Article)
Subject: Vlsi , Vlsi Circuits
Author: R. Vemuri      R. K. Gupta     
page:      107 - 108
Solving Satisfiability Problems Using Reconfigurable (Article)
Subject: Algorithms , Reconfigurable Computing , Satisfiability Problems , Search
Author: T. Suyama      M. Yokoo      H. Sawada      A. Nagoya     
page:      109 - 116
Atpg For Combinational Circuits On Configurable Hardware (Article)
Subject: Atpg , Combinational Circuits , Concurrency , Configurable Computing
Author: F. Focan      D. G. Saab     
page:      117 - 129
An Automated Process For Compiling Dataflow Graphs Into Reconfigurable Hardware (Article)
Subject: Adaptive Computing , Configurable , Image Processing , Reconfigureable Systems
Author: R. Rinker      M. Carter      A. Patel      M. Chawathe     
page:      130 - 139
Fine-Grained And Coarse-Grained Behavioral Partitioning With Effective Utilization Of Memory And Design Space Exploration For Multi-Fpga Architectures (Article)
Subject: Design Space Exploration , Field Progammable Gate Arary (Fpga) , Partitioning , Reconfigureable Computers
Author: V. Srinivasan      S. Govindarajan      R. Vemuri     
page:      140 - 158
Energy-Efficient Design Of Battery-Powered Embedded Systems (Article)
Subject: Low-Power Design , Performance Tradeoffs , Power Consumption Model , System-Level
Author: T. Simunic      L. Benini      G. De Micheli     
page:      15 - 28
Bist-Based Test And Diagnosis Of Fpga Logic Blocks (Article)
Subject: Built-In-Self-Test , Fault-Tolerance , Fpga Diagnosis , Fpga Testing
Author: M. Abramovici      C. E. Stroud     
page:      159 - 172
A Formal Approach To Context Scheduling For Multicontext Reconfigurable Architectures (Article)
Subject: Performance-Tradeoffs , Reconfigurable-Computing , System-Level
Author: R. Maestre      F. Kurdahi      M. Fernandez      R. Hermida     
page:      173 - 185
Design And Analysis Of A Dynamically Reconfigurable Three-Dimensional Fpga (Article)
Subject: Dynamic Reconfiguration , Field Programmable Gate Arrary (Fpga) , Three-Dimensional (3-D) Vlsi Technology
Author: S. Chiricescu      M. Leeser      M. M. Vai     
page:      186 - 196
A Bitstream Reconfigurable Fpga Implementation Of The Wsat Algorithm (Article)
Subject: Cost , Design , Digital , Programmable Logic Array
Author: P. H. W. Leong      C. W. Sham      W. C. Wong      W. S. Yuen     
page:      197 - 200
Unifying Simulation And Execution In A Design Environment For Fpga Systems (Article)
Subject: Debug , Field Programmable Gate Arrary (Fpga) , Reconfigurable Computing
Author: B. L. Hutchings      B. E. Nelson     
page:      201 - 204
Object-Oriented Domain Specific Compilers For Programming Fpgas (Article)
Subject: Adaptive Computing , Boolean Satisfiability , Computer Arithmetic , Configurable Computing
Author: O. Mencer      M. Platzner      M. Morf      M. J. Flynn     
page:      205 - 209
A Temoral Bipartitioning Algorithm For Dynamically Reconfigurable Fpgas (Article)
Subject: Drfpga , Fipsoc , Temporal Bipartitioning
Author: E. Conto      J. M. Moreno      J. Cabestany      J. M. Insenser     
page:      210 - 217
The Cobra-Abs High-Level Synthesis System For Multi-Fpga Custom Computing Machines (Article)
Subject: Allocation , Compilers , Custom Computing , Dsp Synthesis
Author: A. A. Duncan      D. C. Hendry      P. Gray     
page:      218 - 222
Structural Analysis And Generation Of Synthetic Digital Circuits With Memory (Article)
Subject: Field Programmable Gate Arrary (Fpga) , Stochastic Circuit Generation , Structural Circuit Analysis
Author: S. J. E. Wilton      J. Rose      Z. Vranesic     
page:      223 - 226
Reconfigureable Vlsi Architectures For Evolvable Hardware: From Experimental Field Programmable Transistor Arrays To Evolution-Oriented Chips (Article)
Subject: Adaptive Computing , Evolvable Hardware , Field Progammable Gate Arary (Fpga) , Genetic Algorithm
Author: A. Stoica      R. Zebulum      D. Keymeulen      R. Tawel     
page:      227 - 232
Nonideal Battery And Main Memory Effects On Cpu Speed-Setting For Low Power (Article)
Subject: Battery Modeling , Low Power Dissipation , Low Power Design , System Level
Author: T. L. Martin      D. P. Siewiorek     
page:      29 - 33
Estimation Of Lower And Upper Bounds On The Power Consumption From Scheduled Data Flow Graphs (Article)
Subject: Bound Estimation , High-Level Synthesis , Low-Power , Power Dissiption
Author: L. Kruse      E. Schmidt      G. Jochens      A. Stammermann     
page:      3 - 14
Reducing Power Consumption Of Turbo-Code Decoder Using Adaptive Iteration With Variable Supply Voltage (Article)
Subject: Communication , Digital , Low-Power , System-Level
Author: O. Y.-H. Leung      R. S.-K. Cheng      C.-Y. Tsui     
page:      34 - 41
Speed, Power, Area And Latency Tradeoffs In Adaptive Fir Filtering For Prml Read Channels (Article)
Subject: Design , Digital Cmos , Digital Filter , High Performance
Author: K. Muhammad      R. B. Staszewski      P. T. Balsara     
page:      42 - 51
True Single-Phase Adiabatic Circuitry (Article)
Subject: Adiabatic Circuits , Carry-Lookahead Adder , Dynamic Circuits , Energy Recovery Logic
Author: M. C. Papaefthymiou      S Kim     
page:      52 - 63
Vinration-To-Electric Energy Conversion (Article)
Subject: Delay-Locked-Loop , Low Power Design , Low Power Dissipation , Mixed Signal
Author: S. Meninger      J. O. Mur-Miranda      R. Amirtharajah      A. Chandrakasan     
page:      64 - 76
Reducing Leakage In A High-Performance Deep-Submicron Instruction Cache (Article)
Subject: Adaptive Systems , Cache Memories , Computer Architecture , Energy Management
Author: S.-H. Yang      B. Falsafi      K. Roy      M. Powell     
page:      77 - 89
Robust Subthreshold Logic For Ultra-Low Power Operation (Article)
Subject: Subthreshold Dynamic Threshold Voltage Mos , Subthreshold Logic , Variable Threshold Voltage Subthreshold Cmos
Author: H. Soeleman      B. C. Paul      K. Roy     
page:      90 - 99